Qualcomm Inc. v. Apple Inc.

24 F.4th 1367

QUALCOMM INCORPORATED, Appellant

v.APPLE INC., Appellee

Andrew Hirshfeld, Performing the Functions and Duties of the Under Secretary of Commerce for Intellectual Property and Director of the United States Patent and Trademark Office, Intervenor

2020-1558, 2020-1559

United States Court of Appeals, Federal Circuit.

Decided: February 1, 2022

Jennifer L. Swize, Jones Day, Washington, DC, argued for appellant. Also represented by Robert Breetz, David B. Cochran, David Michael Maiorana, Joseph M. Sauer, Cleveland, OH; Matthew Johnson, Joshua R. Nightingale, Pittsburgh, PA; Israel Sasha Mayergoyz, Chicago, IL.

Lauren Ann Degnan, Fish & Richardson PC, Washington, DC, argued for appellee. Also represented by Michael John Ballanco, Christopher Dryer; Whitney Reichel, Boston, MA.

Maureen Donovan Queler, Office of the Solicitor, United States Patent and Trademark Office, Alexandria, VA, argued for intervenor. Also represented by Thomas W. Krause, Robert J. McManus, Farheena Yasmeen Rasheed.

Before Taranto, Bryson, and Chen, Circuit Judges.

Chen, Circuit Judge.

Qualcomm Inc. (Qualcomm) appeals from two related inter partes review (IPR) decisions of the Patent Trial and Appeal Board (Board) finding several claims of Qualcomm's U.S. Patent No. 8,063,674 ('674 patent) unpatentable under 35 U.S.C. § 103.¹ To reach its unpatentability finding, the Board relied on a ground raised by Apple Inc. (Apple) that relied in part on applicant admitted prior art (AAPA)—here, statements in the challenged patent acknowledging that most of the limitations of the patent's claims were already known—and a prior art patent. Qualcomm argues the Board's reliance on AAPA runs afoul of 35 U.S.C. § 311(b), which limits an inter partes review petitioner to challenge claims as unpatentable "only on a ground that could be raised under section 102 or 103 and only on the basis of prior art consisting of patents or printed publications. " § 311(b) (emphasis added). Because we agree with Qualcomm that the Board erred in concluding that AAPA constitutes "prior art consisting of patents or printed publications" under § 311(b), we vacate the Board's decision. We remand for the Board to determine whether Apple's petition nonetheless raises its § 103 challenge "on the basis of prior art consisting of patents or printed publications." § 311(b) (emphasis added).

BACKGROUND

A

Qualcomm owns the '674 patent, which is directed to integrated circuit devices with power detection circuits for systems with multiple supply voltages. See '674 patent at Abstract, col. 1 ll. 6–8. According to the '674 patent, modern integrated circuits often contain multiple networks operating at different supply voltages. See id. at col. 1 ll. 22–25. For example, a core logic network may operate at a lower voltage, and an input/output network may simultaneously operate at a higher voltage. See id. Such a system can save power by allowing the broader circuit to power down a network, like the core logic network, when it is not needed. See id. at col. 1 ll. 26–40.

The patent describes "level shifters" that communicate between the input/output devices and the core devices. See id. at col. 1 ll. 28–29. When the core devices are powered down, the connection between the core and input/output network through the level shifters can lead to problems. One such problem is stray currents causing the level shifters to trigger the input/output devices for transmission resulting in erroneous output signals from the circuit. See id. at col. 1 ll. 29–40.

The '674 patent describes a prior art method to remedy the stray current problem. The Background states that power-up/down detectors can be used to generate a power-on/off-control (POC) signal internally that instructs the input/output devices when the core devices are shut down. See id. at col. 1 ll. 55–58. Figure 1 of the patent depicts a "prior art" "standard POC system" with a power-up/down detector 100:

Id. at Figure 1.

The patent asserts that there are problems with the prior art solution in Figure 1. For example, when the input/output power supply 104 is on and the core power is off, powering up the core results in "a period in which all three transistors [M1-M3] within power up/down detector 100 are on," causing "a significant amount of current to flow from [input/output] power supply 104 to ground." Id. at col. 2 ll. 21–29. The '674 patent recognizes that "decreas[ing] the sizes of the transistors M1-M3" can physically limit this "glitch current" or leakage but notes that smaller transistors may reduce detection sensitivity or result in "longer processing time for power-up/down events." Id. at col. 2 ll. 31–39; see also id. at col. 2 l. 63–col. 3 l. 11.

The '674 patent avoids these problems by adding a feedback network to increase detection speed. See id. at col. 6 ll. 25–28. Specifically, as depicted in Figure 4, the '674 patent includes power-up transistor M8. Transistor M8 transitions from on to off during power-up and from off to on during power-down. See id. at col. 6 ll. 12–18, 21–28. When M8 is off, the current capacity of the power-up/down detector is reduced. When M8 is on, the power-up/down detector has increased current capacity resulting in quicker detection of the core powering down. See id.

Claims 1, 2, 5–9, 12, 13, and 16–22 of the '674 patent are at issue on appeal. Claim 1, reproduced below, is illustrative of the claimed invention:

1. A multiple supply voltage device comprising:

a core network operative at a first supply voltage; and

a control network coupled to said core network wherein said control network is configured to transmit a control signal, said control network comprising: an up/down (up/down) detector configured to detect a power state of said core network; processing circuitry coupled to said up/down detector and configured to generate said control signal based on said power state;

one or more feedback circuits coupled to said up/down detector, said one or more feedback circuits configured to provide feedback signals to adjust a current capacity of said up/down detector;

at least one first transistor coupled to a second supply voltage, the at least one more first transistor being configured to switch on when said first supply voltage is powered down and to switch off when said first supply voltage is powered on;

at least one second transistor coupled in series with the at least one first transistor and coupled to said first supply voltage, the at least one second transistor being configured to switch on when said first supply voltage is powered on and to switch off when said first supply voltage is powered down;

at least one third transistor coupled in series between the at least one first transistor and the at least one second transistor.

'674 patent at claim 1.

B

Apple filed two petitions for inter partes review² based on the same two grounds but each challenging different sets of claims in the '674 patent. In ground 1, Apple challenged the claims as unpatentable under § 103 in view of Steinacker³ , Doyle,⁴ and Park.⁵ In its final written decision, the Board found that Apple had not proven with this ground the unpatentability of the challenged claims.

Apple's second ground relied on AAPA—Figure 1 and its accompanying description in the '674 patent —in view of Majcherczak.⁶ Like the '674 patent, Majcherczak relates to "integrated circuit[s] using at least two power supply voltages." Majcherczak ¶ 1. Majcherczak discloses a voltage detection device that detects, among other things, when the core voltage is powered down. Apple argued that a skilled artisan would have found it obvious to integrate Majcherczak's feedback transistor into the POC system described as prior art by the '674 patent, as shown below:

AAPA + Majcherczak POC System

Qualcomm conceded that the combination of AAPA and Majcherczak teaches each element of the challenged claims, see Apple Inc. v. Qualcomm Inc. , IPR2018-01315, - 01316, 2020 Pat. App. LEXIS 5250, *28 (P.T.A.B. Jan. 3, 2020) (Board Op. ); J.A. 385–86, but challenged Apple's use of AAPA. Qualcomm argued that such patent owner admissions cannot be used to challenge the validity of a patent in inter partes review. See Board Op. at *15–17; J.A. 403.⁷ The Board disagreed. See Board Op. at *18–19 ("Because AAPA is admitted to be prior art and is found in the '674 patent, it can be used to challenge the claims in an inter partes review."). Underpinning the Board's analysis was its conclusion that, under 35 U.S.C. § 311(b), "prior art consisting of patents or printed publications" includes AAPA because it is prior art contained in a patent. See id. at *19. Having decided that Apple's use of AAPA was proper under the statute, the Board found that the AAPA with Majcherczak rendered the challenged claims unpatentable as obvious.

Qualcomm timely appeals. We have jurisdiction under 28 U.S.C. § 1295(a)(4)(A).

DISCUSSION

This appeal concerns the use of AAPA in inter partes review.⁸ Qualcomm, Apple, and the United States Patent and Trademark Office (PTO) each offer competing views of the propriety of AAPA's role in inter partes review and differing interpretations of the phrase "prior art consisting of patents or printed publications" in § 311(b).

Qualcomm initially argued that AAPA may not be considered in inter partes review. See Appellant's Br. 20 ("[A] purported admission in the patent that is the subject [of] an inter partes review cannot be used to challenge claims in the IPR."). Qualcomm explained that § 311(b) requires any ground in an inter partes review to be based only on prior art patents or prior art printed publications. See id. at 24. Finding no support in § 311(b) for the use of AAPA, Qualcomm posited that the statute precludes any and all use of a patent owner's admissions in inter partes review. See id. at 24–25. Qualcomm, however, softened its position in reply, acknowledging that "general knowledge and non- Section 311(b) art [e.g., AAPA] may have a role to play in IPR proceedings," ...